ECE 733 Digital Electronics
Spring 2009
Homeworks
Homework 1
Revision of static circuit design; Tool refamiliarization; Circuit Analysis
Due Date: Wednesday, January 21. (One week later with a 10% penalty)
Homework 2
Advanced Combinational Logic Circuit Design.
Due Date: Friday, February 13. (One week later with a 10% penalty)
Assignments below not available yet.
Flip-flop design. (Klass paper can be found in http://courses.ncsu.edu/ece733/lec/001/wrap/ )
Due Date: Monday, March 23 (One week later with a 10% penalty) (March 30 for EOL students)
-----Materials below not assigned yet----
Transceiver Design. Due Friday, April 24. Spice Support File.