|Speaker||H.-S. Philip Wong|
|Organization||Willard R. and Inez Kerr Bell Professor in the School of Engineering, Stanford University|
|Location||Monteith Research Center, RM 136|
|Start Date||April 3, 2014 1:00 PM|
|End Date||April 3, 2014 2:00 PM|
ABSTRACT: Unlike classical enterprise computing that operates on structured, digital data, 21st century information technology (IT) must process, understand, classify, and organize the vast amount of data in real-time. 21st century applications will be dominated by machine-learning kernels operating on Tbytes of active data with little data locality. At the same time, massively redundant sensor arrays sampling the world around us will give humans the perception of additional 'senses' blurring the boundary between biological, physical, and cyber worlds. The challenge is to manage the resulting data deluge; e.g., processing 1014 floating-point operations per second using 1 W between the retina and the brain, or a neural map yielding data at 1 Tbit/sec. Processing such data in wearable devices clearly demands computation well beyond the state of the art.
As information technology become pervasive in society and ubiquitous in our lives, the desire for always-on, always-available, embedded everywhere, and human-centric information systems may call for a different computation paradigm. Emulation of the brain, both by brute force supercomputers or innovative nanoscale electronic devices, is becoming possible and will reach human-scale if the present rate of progress continues.
In this talk, I will describe the use of nanoscale electronic devices that emulate the functions of the biological synapse. The goal is to develop hardware technologies for brain-inspired computing and electronic emulation of the brain. Phase change memory is employed to demonstrate the spike-timing-dependent plasticity (STDP) behavior of the biological synapse. A small array of such devices are connected in a recurrent Hopfield network to perform pattern recognition tasks and the tradeoff between variation tolerance and the speed/energy performance of the network is studied. The use of metal oxide resistive switching memory (RRAM) presents another interesting possibility. The stochastic nature of the physics of resistive switching enables RRAM to serve as analog weights in a neural network.