Software Thread Integration for Converting TLP to ILP on VLIW/EPIC Architecture

SpeakerWon So
Organization NC State University
Location136 EGRC
DateSeptember 16, 2002 4:10 PM

Multimedia applications are pervasive in modern systems. They generally require a significantly higher level of performance than previous workloads of embedded systems. They have driven digital signal processor makers to introduce high-performance architectures like VLIW (Very-Long Instruction Word) or EPIC (Explicitly Parallel Instruction Computing). Despite many efforts to exploit instruction level parallelism (ILP) in the application, typical utilization levels for compiler-generated VLIW/EPIC code range from one-eighth to one-half because a single instruction stream has limited ILP.

Software Thread Integration (STI) is a software technique which interleaves multiples of threads at the machine instruction level. Integration of threads increases the number of independent instructions, allowing the compiler to generate a more efficient instruction schedule and hence faster runtime performance. We have developed techniques to use STI for converting abundant thread level parallelism (TLP) in multimedia applications to ILP on VLIW/EPIC architectures in order to improve utilization of wasted resources. This thread integration can be seen as a superset of loop jamming as it allows a larger variety of threads to be jammed together. In this research, we propose a general methodology to integrate multiple threads in multimedia applications and introduce the concept of a 'Smart RTOS' as an execution model for utilizing integrated threads efficiently in embedded systems. Experimental results running a JPEG application on the Itanium processor by compiling the original and integrated threads with various compilers are used to demonstrate the performance improvement by STI.

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