System-Level Design: Why Don't We Like It?

SpeakerDr. Rhett Davis
Organization NC State University
Location136 EGRC
DateNovember 18, 2002 4:10 PM

One of the crises of VLSI design that we hear commonly mentioned is the "productivity gap" between the number of transistors per chip that can be effectively manufactured and the transistors-per-designer-per-year that we can effectively design. System-level design techniques promise a way to lessen this gap but have unfortunately been slow to catch on. This talk presents a summary of some of the more popular system-level design concepts, including behavioral synthesis, platform-based design, SystemC, and System Verilog, with an examination of what we like and don't like, and what we're likely to see in the future.

  November 2002
Sun Mon Tues Wed Thu Fri Sat
     12
3456789
10111213141516
17181920212223
24252627282930