Network Processor Features and Design Challenges for the Network Edge

SpeakerKip Potter
Organization Cisco Systems
LocationEB2 1025
Start Date February 9, 2007 3:50 PM
End Date February 9, 2007 4:40 PM

Abstract:

The architecture and design of network processors have changed significantly over the last few years as they take on increasingly more complex network features.  For many roles in a network, SW code size, portability and flexibility have become just as important as raw throughput.  And areas of significant focus in the past such as forwarding table lookups become less significant as other features begin to dominate the processing load.

This talk will describe some of the key requirements that network processors must now support and how those translate into architectural decisions and tradeoffs.  And it will describe many of the specific technical challenges impacting the design such as the external memory limitations, scaling, ease of SW programming, power consumption, packet ordering, flow size, etc.

About the speaker:

Kip Potter is a Cisco Distinguished Engineer at Cisco Systems in their Mid-Range Router Business Unit.  He has been involved in network processor design and products incorporating them over the last 9 years.  He worked on one of the original network processor designs within Cisco called Toaster and is currently the lead HW architect for a product incorporating Cisco's newest network processor geared toward the network edge.  He holds 32 patents related to networking and network processor design.

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