Calendar
| Speaker | Dr. Gabriel H. Loh |
|---|---|
| Organization | Georgia Institute of Technology |
| Location | EB2, Room 1021 |
| Start Date | September 28, 2007 2:20 PM |
| End Date | September 28, 2007 3:10 PM |
Abstract:
Three-dimensional integration is a new fabrication technology that allows stacking multiple layers of silicon into a single, tightly integrated system. The advantages include greater device density, drastic reduction in wiring due to the flexibility of 3D placement and routing, and the potential for integration of heterogeneous technologies. In this talk, I will briefly provide an overview of the state of the art of 3D integration process technology, and then I will discuss several applications of 3D at different levels of granularity in the design process: at the circuit level, functional unit block level, and at the system level.
Bio:
Gabriel H. Loh received the B.E. degree in electrical engineering from Cooper Union, New York, NY, in 1998, and the M.S. and Ph.D. degrees in computer science from Yale University, New Haven, CT, in 1999 and 2002, respectively. From 2003 to 2004, he was a Senior Researcher with the Microarchitecture Research Laboratory at Intel Corporation. He is currently an Assistant Professor in the School of Computer Science at the Georgia Institute of Technology. His research interests include computer architecture, processor microarchitecture, simulation, circuit design, and three-dimensional integration technology. He is a recipient of the NSF faculty early career development (CAREER) award.
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