Calendar

Current Events

3.30

Creating a Sustainable Society

3.16

Sustainable Energy Engineering

2.28

National Science Foundation Day

2.17

Reformulation-Based Approaches to Query Optimization

2.15

FREEDM Day

2.10

WEST: Cloning Data Cache Behavior using Stochastic Traces

2.09

Computer Vision and Image Analysis in the Study of Art

2.08

GSA Social

2.03

Skewed functional processes and their applications

The Benefits of Implementing Interconnection Networks on 3DICs

Abstract:

Constantly evolving semiconductor fabrication techniques enable the design of more complex digital systems than the industry has ever seen.  With shrinking devices sizes, current chip design trends have been toward multicore parallel processing and SoC (System-on-Chip) architectures.  As technology nodes continue to scale, an increased number of processing elements will be communicating on-chip, necessitating more elegant communication systems than currently being implemented.  Interconnection networks in which processing elements are equipped with routers that pass messages to one another over an interconnect fabric are a recognized solution to this problem.  There are many types of interconnection networks, most of which having complex interconnect fabrics that are difficult to implement on a traditional two dimensional VLSI chip.

This talk will address the potential advantages in terms of power, performance, and design reuse when such interconnection networks are implemented on three dimensional integrated circuits (3DICs).  The emerging stacked die technology in which devices are electrically connected to each other via vertical interconnects allows designers to realize much more efficient interconnection networks than possible using two dimensional technologies.  3DICs enable the implementation of interconnection network topologies that are infeasible in a strictly 2D world.  Preliminary results will be presented for a computationally intensive partially parallel low density parity check decoder, showing the power of implementing state of the art designs on a fully 3D interconnection network.