This emerging standard promises to deliver models earlier, and provide superior simulation performance and accuracy than has been possible using traditional signal integrity model development approaches. As digital system design engineers are increasingly challenged by higher clock speeds and special packaging, signal integrity simulation is becoming imperative. IBIS addresses fundamental simulation issues:
A Basic IBIS Model
The IBIS (I/O Buffer Information Specification) is a consistent format that semiconductor vendors can use to specify the analog characteristics of input and output buffers. This essential information is readily transformed into accurate models by end users and simulation tool vendors. The resulting behavioral models allow users to perform high-speed, accurate signal-integrity simulations of their digital system interconnects.
NCSU's Spice-to-IBIS model generation utility has been used by the industry professionals and researchers alike to create IBIS models for a number of years now. S2IBIS requires a SPICE (most versions) netlist of the IO buffer and a command file (*.s2i) to generate IBIS models.
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