supported by:
Low Power Circuits
Dr. Paul D. Franzon
919.515.7351, fax. 919.515.2285
www.ece.ncsu.edu/erl/faculty/paulf.html
The goal of this ongoing activity is to develop a range of novel structures for Micropower digital circuits. In the past we did work on low-power DRAMs, glitch removal for power reduction and CAD tools for low power design. Today, my group is focused on the development of new circuit structures using Silicon On Insulator (SOI) technology. This work is mainly in the context of a NASA supported project in which we are building a 20 mW radio receiver for possible future deep space missions. This project is being conducted collaboratively with Wentai Liu, NCA&T and JPL.
We are in the process of patenting a number of these technologies. A non-disclosing brief can be found here : talk
Publications
R.J. Evans and P.D. Franzon, Energy consumption modeling and optimization for SRAMs, IEEE Journal of Solid State Circuits, Vol. 30, no. 5, May 1995, pp. 571-579
S. Washabaugh, P.D. Franzon and H.T. Nagle, SABSA: Switching-Activity Based State Assignment , International Journal of High Speed Electronics and Systems, Vol. 5, No. 2 (1994),203-212.
S. Ma and P. Franzon: Energy Control in CMOS Buffers, IEEE Journal of Solid State Circuits, Vol. 29, No. 9, September 1994,pp. 1150--1153.
P. Franzon, and R. Evans, An MCM Design Process with Application to a Laptop Computer Design , April 1993, Vol. 26, No. 4, pp. 41--49, IEEE Computer Magazine.