3DIC and 3D Packaging

Dr. Paul D. Franzon

paulf@ncsu.edu

919.515.7351, fax. 919.515.2285
www.ece.ncsu.edu/erl/faculty/paulf.html

Brief Description

Stacking of silicon chips using Through Silicon Vias (TSVs) establishes the potential for high density, high performance 3D systems.  3D packaging permits further miniaturization of such systems.  In these projects, we are pursuing the following goals:

We gratefully acknowledge the support of DARPA, AFRL, MARCO and SRC in this work.

Selected Publications

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