NanoInterconnect

Dr. Paul D. Franzon

paulf@ncsu.edu

919.515.7351, fax. 919.515.2285
www.ece.ncsu.edu/erl/faculty/paulf.html

Brief Description

The goals of this project are to determine manufacturable techniques to fabricate nanowires beyond the capabilities of lithography, to characterize their properties and establish their circuit principles.

One project is entitled PEDAL : "Planar Edge Defined Alternate Layers". The goal of this project is to establish a manufacturing technology for the nano-imprinting of wire arrays with a pitch below 30 nm.

In another project, we determined approaches to fanout from the nanowire array to the microscale array.

We thank the National Science Foundation and DARPA for support of this project.

Selected Publications

• Sonkusale. S, Amsinck C. J, Nackashi D. P, Di Spigna N. H, Barlage D, Johnson M, Franzon P. D, “ Fabrication of wafer-scale, aligned Sub-25 nm naowires and templates using Planar Edge Defined Alternate Layer (PEDAL) Process,” Physica E. Low Dimensional Systems and Nanostructures. Paper
• Di Spigna, N., D. Nackashi, C. Amsinck, S. Sonkusale, and P. Franzon, "Deterministic Nanowire Fanout and Interconnect Without Any Translational Alignment", IEEE Transactions on Nanotechnology, Vol. 5, No. 4, July 2006, pp. 356-361. paper