Paul D. Franzon

Research

 

My research focuses on building microsystems and nanosystems. I specialize in the following areas:

  • Interconnect Structures and Circuits. High-density, high-speed and low-power on-chip and intra-chip interconnect circuits and structures. Applications that benefit from high bandwidth interconnect, and SOP design techniques. This topic includes the following projects:
    • AC Coupled Interconnect. Novel contactless, high bandwidth, low-power packaging structures and circuits for chip packaging, sockets and connectors.
    • On-chip interconnect. Using on-chip equalization for the design of low-power repeaterless global on-chip interconnect. Past work includes other techniques for low-power interconnect design, and development of on-chip measurement techniques.
    • 3D ICs and Packaging. The design, and CAD support, for 3D (stacked) ICs and multi-chip packages.
    • Nanointerconnect. A nanofabrciated interconnect structures capable of sub-25 nm features.
    • Chip-Package Codesign. Methdologies and tools for codesign of chips, packages, and multichip modules. Includes ongoing support for IO macromodeling, including Spice2Ibis.

  • Application Specific Processors and Microsystems. ASICs, SOCs and SOPs with an emphasis on novel hardware algorithms and design methodology for high performance systems. By "microsystems" I am referring to the design, and incorporation non-chip technologies, such as MEMS ("micromachining").
    • Network Hardware Design. Hardware support for line-rate network security, including filters (e.g. Snort), firewalls, and anomoly detection, correlation, effiecient IP lookup and other networking functions and applications.
    • Braille Display. Build a low-power portable full-page refreshable Braille display.
    • Food Processing Sensor. Build a low-power food processing sensor to allow certification of aseptic processing and for other food manufacturing applications.
    • Low-power Speech Recognition. Design of low-power speech recognition IC.
    • SOI radio design. Design of a low-power VHF radio for deep space sensor networks.
    • MEMS Varactor. MEMS structure for RF varactor (tunable capacitor).
    • Novel MEMS Applications. Exploration of MEMS applications outside of RF.
    • Past Projects include low-power memory design, high perofrmance actuators, and CAD for low-power and reconfigurable computing.
  • Nanocomputing. Concepts for computation beyond the end of CMOS scaling. Includes devices, interconnect structures and circuit/architecture concepts.
    • Nanocrystal Electronics. Explore digital and analog circuit applications of nanocrystal floating gate FETs.
    • Molecular Computing. Structures and circuits for molecular computing.
    • Nanowire fabrication.. A nanofabrciated interconnect structures capable of sub-25 nm features.
    • Other Nanocomputing devies and structures.

As well as the students listed on the left, I would also like to acknowledge the following professional staffthat contribute to this research:

Dr. Neil DiSpigna, Dr. Steve Lipa, Dr. Meeta Yadav, and Dr. Peichun Yang.

Contact: paulf@ncsu.edu

Last Modified: July 2008