Low-Power, High-Performance MEMS-based Switch Fabric
Presenter: Paul D. Franzon
Co-PIs: Wentai Liu, Michael Steer
GRAs: Bruce Duewer, David Winick, John Wilson, Umut Eksi, John Tucker, Som Paudchury
Department of Electrical and Computer Engineering
North Carolina State University
(919) 515 7351
and in collaboration with MCNC
- Produce a High Bandwidth Reconfigurable Switch Technology
- Sustained data rates >> 1 Gbps
- Low power to reconfigure
- Goal: One-quarter of equivalent CMOS
- Low power to transmit data
- Goal: One-quarter of equivalent CMOS switch
- Reconfiguration rate O(100 ns)
- Cheaper than CMOS (about $10/cm^2)
- Dense -- Goal: 192*192 switch
Also investigate RF and analog applications of technology.
- MEMS = MicroElectroMechanical Systems (`micromachines')
- Transmit signals as pulses
- Build switches out of series capacitors
- `Up' = low capacitance, Switch open
- `Down' = high capacitance, Switch closed.
- Reconfigure switch array electrostatically
- Flip-mount (or edge mount) Switches to CMOS
- Encode data as a pulse train, rather than edges.
- Don't need contacting switches -- 0.1 pF series capacitor passes signals.
- Reduces power at high data rates.
- Reduces noise levels
- More complex receiver and synchronization
- Need to characterize signal itegrity and robustness
4*4 Switch architecture
Schematic of one switch
SEM photo of piston array
- Configurable Computing
- Programmable Interconnect
- System network routers/switches
- Analog/RF version): Low-cost components
- Capacitive MEMS switches show potential for delivering low-power, high-bandwidth reconfigurable interconnect structures.
- Main technical innovations:
- Pulse signalling.
- Dense addressable piston (capacitor) array
- Potential to serve as an RF component too for beam steering, etc.
- Funded by DARPA and NSF