################################################
#                                              #
#  FirstEncounter Input configuration file     #
#                                              #
################################################
global rda_Input
set rda_Input(ui_netlist) "../../../hw6/or1200/syn/synopsys/out/final_or1200_top.v"
set rda_Input(ui_netlisttype) "Verilog"
set rda_Input(ui_ilmlist) ""
set rda_Input(ui_settop) "1"
set rda_Input(ui_topcell) "or1200_top"
set rda_Input(ui_celllib) "/afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/fe/cellsLib/ncsulib25.cdump"
set rda_Input(ui_iolib) "/afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/fe/ios/ncsulib25.io.cdump"
set rda_Input(ui_areaiolib) ""
set rda_Input(ui_blklib) "/afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/memory/block"
set rda_Input(ui_kboxlib) ""
set rda_Input(ui_timelib) "/afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/ncsulib25_best.lib /afs/eos.ncsu.edu/lockers/workspace/ece/ece741/common/TSMC025_deep/ncsulib25_worst.lib"
set rda_Input(ui_smodDef) ""
set rda_Input(ui_smodData) ""
set rda_Input(ui_dpath) ""
set rda_Input(ui_tech_file) "/afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/fe/ncsulib25.tech"
set rda_Input(ui_io_file) ""
set rda_Input(ui_timingcon_file) ""
set rda_Input(ui_buf_footprint) ""
set rda_Input(ui_delay_footprint) ""
set rda_Input(ui_leffile) "/afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/fe/ncsulib25.lef /afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/memory/lef/art_hdsp_2048x32.lef /afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/memory/lef/art_hsdp_32x32.lef /afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/memory/lef/art_hssp_1024x32.lef /afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/memory/lef/art_hssp_1024x8.lef /afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/memory/lef/art_hssp_2048x32.lef /afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/memory/lef/art_hssp_2048x8.lef /afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/memory/lef/art_hssp_256x21.lef /afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/memory/lef/art_hssp_512x20.lef /afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/memory/lef/art_hssp_64x14.lef /afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/memory/lef/art_hssp_64x22.lef /afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/memory/lef/art_hssp_64x24.lef /afs/eos.ncsu.edu/lockers/workspace/ece/ece741/001/common/TSMC025_deep/memory/lef/or1200_cfgr.lef"
set rda_Input(ui_core_cntl) "aspect"
set rda_Input(ui_aspect_ratio) "1.0"
set rda_Input(ui_core_util) "0.7"
set rda_Input(ui_core_height) ""
set rda_Input(ui_core_width) ""
set rda_Input(ui_core_to_left) ""
set rda_Input(ui_core_to_right) ""
set rda_Input(ui_core_to_top) ""
set rda_Input(ui_core_to_bottom) ""
set rda_Input(ui_max_io_height) "0"
set rda_Input(ui_row_height) ""
set rda_Input(ui_isHorTrackHalfPitch) "0"
set rda_Input(ui_isVerTrackHalfPitch) "1"
set rda_Input(ui_ioOri) "R0"
set rda_Input(ui_isOrigCenter) "0"
set rda_Input(ui_exc_net) ""
set rda_Input(ui_delay_limit) "1000"
set rda_Input(ui_net_delay) "1000.0ps"
set rda_Input(ui_net_load) "0.5pf"
set rda_Input(ui_in_tran_delay) "120.0ps"
set rda_Input(ui_captbl_file) ""
set rda_Input(ui_cap_scale) "1.0"
set rda_Input(ui_res_scale) "1.0"
set rda_Input(ui_shr_scale) "1.0"
set rda_Input(ui_time_unit) "none"
set rda_Input(ui_cap_unit) ""
set rda_Input(ui_pwrnet) {vdd}
set rda_Input(ui_gndnet) {vss}
set rda_Input(flip_first) "1"
set rda_Input(double_back) "1"
set rda_Input(ui_pg_connections) [list \
                        PIN:vdd:: \
                        PIN:vss:: \
                              ]
set rda_Input(PIN:vdd::) "vdd"
set rda_Input(PIN:vss::) "vss"