Journal Papers:

1. Ramsey Hourani, Ravi Jenkal , W. Rhett Davis,Winser Alexander," Automated Design Space Exploration for DSP Applications ", In The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology May 2008..

Conference Papers:

1. Chris Mineo, Ravi Jenkal , Samson Melamed, W. Rhett Davis, " Inter-Die Signaling in Three Dimensional Integrated Circuits ", To appear in IEEE Custom Integrated Circuits Conference (CICC) , September 21 - 24, San Jose, California
   
2. Ravi Jenkal , W. Rhett Davis," An Architecture for Energy Efficient Sphere Decoding", In International Symposium on Low Power Electronics and Design (ISLPED), Portland, Oregon, Aug 27-29, 2007.
   
3. J. E. Stine, I. Castellanos, W. R. Davis, P. D. Franzon, M. Bucher, S. Basavarajaiah, J. Oh, R. Jenkal, "FreePDK: An Open-Source Variation-Aware Design Kit", In International Conference on Microelectronic Systems Education (MSE07), June 2 - 4, 2007.
   
4. Ravi Jenkal, Hao Hua, Ambarish Sule, Rhett Davis, " Architecture for Energy Efficient Sphere Decoding", In IEEE 17th ASIC/SOC Conference (SOCC), Austin, TX, USA, Sept. 24-27, 2006.
   
5. Hao Hua, Chris Mineo, Kory Schoenfliess, Ambarish Sule, Samson Melamed, Ravi Jenkal, Rhett Davis, "Exploring Compromises among Timing, Power and Temperature in Three-Dimensional Integrated Circuits", In IEEE/ACM 43rd Design Automation Conference (DAC), San Fransisco, CA, July 24-28, 2006.
   
6. Ramsey Hourani, Ravi Jenkal , W. Rhett Davis, Winser Alexander,"Tool Integration for Signal Processing Architectural Exploration" Presentation in IEEE Electronic Design Process Symposium (EDPS'06), Monterey, CA, April 13-14, 2006.

Workshop Papers:

1. Meeta Yadav, Ravi Jenkal , Paul Franzon, Bob Oden, Pete Lafuci, "Developing Infrastructure for an Advanced Application Specific Integrated Circuit Verification Course", to appear in 7th European Workshop on Microelectronics Education (EWME), May 28-30, 2008, Budapest, Hungary.
2. Ramsey Hourani, Ravi Jenkal , W. Rhett Davis, Winser Alexander,"Automated Architectural Exploration for Signal Processing Algorithms " In IEEE Workshop on Signal Processing Systems (SiPS'06), Banff, AB, Canada, October 2- 4, 2006.
   

Academic:

1. PhD Preliminary Examination: "Architecture and Design Methodology for Energy Efficient MIMO SoCs" , Department of Electrical and Computer Engineering, North Carolina State University, Dec 2006.
   
2. Ph.D Qualifier Examination: "SystemC based Evaluation of Maximum Likelihood MIMO Receiver Architecture" , Department of Electrical and Computer Engineering, North Carolina State University, May 2005.
   
3. MSc Thesis: "Testbed Design for Throughput Characterization of a Multiple Antenna Stucture" , Department of Electrical and Computer Engineering, North Carolina State University, August 2004.

Presentations:

1. An Architecture for Energy Efficient Sphere Decoding, In ACM International Symposium on Low Power Electronics and Design (ISLPED), Portland, Oregon, Aug 27-29, 2007.
   
2. Ph.D Preliminary Oral Examination Presentation: Architecture and Design Methodology for Energy Efficient MIMO SoCs, Department of Electrical and Computer Engineering, North Carolina State University, Dec. 2006.
   
3. Architecture for Energy Efficient Sphere Decoding, In IEEE ASIC/SOC Conference (SOCC), Austin, TX, Sept. 24-27, 2006.
   
4. Ph.D Qualifier Presentation: SystemC based Evaluation of Maximum Likelihood MIMO Receiver Architecture, Department of Electrical and Computer Engineering, North Carolina State University, May 2005.