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SPEC Seminar 10.28.2005
October 25, 2005
SPEC Seminar
The SPEC bi-weekly seminar will be held:
Friday, October 28, 2005 at 1:30 PM
Suite 1250, Partners I
Centennial Campus
SPEAKER: Yang Gao
Yang Gao is a Ph.D candidate in PSD group, SPEC. Research interest lies in low voltage Silicon power device design, modeling and application.
TOPIC: Design of a novel self-aligned trench power JFET for DC-DC Converters
ABSTRACT: A novel self-aligned process technique for fabricating trench Power JFET using 4 mask layers (trench, contact, metal and pad) is proposed. A unit cell pitch of 1.1 um can be obtained. The specific on-resistance of the device is reduced to 16.9 mٕmm2, which is close to state-of-art of power MOSFET. The overall performance of the proposed power JFET indicates that it could be a good candidate for low-side switch in power DC-DC converters.
The SPEC bi-weekly seminar will be held:
Friday, October 28, 2005 at 1:30 PM
Suite 1250, Partners I
Centennial Campus
SPEAKER: Yang Gao
Yang Gao is a Ph.D candidate in PSD group, SPEC. Research interest lies in low voltage Silicon power device design, modeling and application.
TOPIC: Design of a novel self-aligned trench power JFET for DC-DC Converters
ABSTRACT: A novel self-aligned process technique for fabricating trench Power JFET using 4 mask layers (trench, contact, metal and pad) is proposed. A unit cell pitch of 1.1 um can be obtained. The specific on-resistance of the device is reduced to 16.9 mٕmm2, which is close to state-of-art of power MOSFET. The overall performance of the proposed power JFET indicates that it could be a good candidate for low-side switch in power DC-DC converters.
