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Address
2309 Partners I
Campus Box 7256
NC State University
Raleigh, NC 27695-7256
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Phone
 919-513-2822
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 919-513-7075
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Dr. Eric Rotenberg

Associate Professor

| Biography

Dr. Rotenberg is an Associate Professor of Electrical and Computer Engineering at North Carolina State University. He received the BS degree in electrical engineering (1991) and the MS and PhD degrees in computer sciences (1996, 1999) from the University of Wisconsin-Madison. From 1992 to 1994, he participated in the design of IBM's AS/400 computer in Rochester, MN. He is currently researching high-performance and reliable processor architectures and multi-core architectures. His research is or has been supported by the National Science Foundation, the Semiconductor Research Corporation, Intel, IBM, Ericsson, Texas Instruments, ZettaCore, and the NCSU Center for Advanced Computing and Communication.

| Education

  1. 1991 - BS in Electrical Engineering, University of Wisconsin - Madison
  2. 1996 - MS in Computer Sciences, University of Wisconsin - Madison
  3. 1999 - PhD in Computer Sciences, University of Wisconsin - Madison

| Primary Research Interests

  1. Computer Architecture and Systems (Including Microprocessor Architecture)

| Selected Publications

  1. H. Hashemi Najaf-abadi and E. Rotenberg. Architectural Contesting. Proceedings of the 15th IEEE International Symposium on High-Performance Computer Architecture (HPCA-15), pp. 189-200, February 2009.
  2. A. El-Haj-Mahmoud, A. S. Al-Zawawi, A. Anantaraman, and E. Rotenberg. Virtual Multiprocessor: An Analyzable, High-Performance Microarchitecture for Real-Time Computing. Proceedings of the 2005 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES'05), pp. 213-224, September 2005.
  3. K. Sundaramoorthy, Z. Purser, and E. Rotenberg. Slipstream Processors: Improving both Performance and Fault Tolerance. Proceedings of the 9th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-9), pp. 257-268, November 2000.
  4. E. Rotenberg. AR-SMT: A Microarchitectural Approach to Fault Tolerance in Microprocessors. Proceedings of the 29th IEEE International Symposium on Fault-Tolerant Computing (FTCS-29), pp. 84-91, June 1999.
  5. E. Rotenberg, S. Bennett, and J. E. Smith. Trace Cache: A Low Latency Approach to High Bandwidth Instruction Fetching. Proceedings of the 29th IEEE/ACM International Symposium on Microarchitecture (MICRO-29), pp. 24-34, December 1996.

| Awards and Honors

  • 2004 - Academy of Outstanding Teachers (NC State)
  • 2004 - Alumni Outstanding Teacher Award (NC State)
  • 2001 - NSF Career Award
  • 1997 - MICRO-30 Best Paper Award