Rotenberg Receives the 2015 Micro Test-of-Time Award
Prof. Eric Rotenberg and co-authors Steve Bennett and Jim Smith received the 2015 Micro Test of Time Award.
Prof. Eric Rotenberg and co-authors Steve Bennett and Jim Smith received the 2015 Micro Test of Time Award, for their paper: “Trace Cache: A Low Latency Approach to High Bandwidth Instruction Fetching” from the Proceedings of the 29th IEEE/ACM International Symposium on Microarchitecture (MICRO-29), pp. 24-34, published in December 1996.
This award is “in recognition as One of the Most Influential Papers of the Symposium” in its 48-year existence. The Micro Test of Time Award recognizes an influential MICRO paper whose influence is still felt 18-22 years after its initial publication.
High-performance microprocessors are at the heart of all major computing devices today, including data centers,
supercomputers, PCs/laptops, and smart phones. What makes them high performance is the ability to automatically fetch and execute many program instructions in parallel, from what otherwise appears to be a sequential program. Most programs have frequent decision points, called branch instructions, that disrupt the parallel fetching of instructions.
The MICRO-29 paper by Rotenberg, Bennett, and Smith proposed a practical mechanism, called the trace cache, for fetching many instructions in parallel in spite of frequent branches. The trace cache influenced much follow-on research and development on instruction fetch mechanisms, but also enabled other optimizations and even whole new microprocessor architectures, including trace processors. A trace cache was implemented in the Intel Pentium-4 microprocessor and similar mechanisms exist in contemporary microprocessors. The MICRO-29 paper has been cited 648 times according to Google Scholar.