High Performance Packaging Approaches for Next Generation SiC Power Modules

SpeakerSayan Seal
Organization University of Arkansas
Location136 Monteith Research Center (MRC)
Start Date April 5, 2017 10:15 AM
End Date April 5, 2017 11:30 AM

Faculty Candidate Seminar

This presentation is based on exploring high performance packaging techniques for highly integrated power electronics modules. It deals with investigating novel approaches to improve upon existing electronic packaging techniques. Proposing and adopting these methods is especially important with the advent of wide bandgap power devices like silicon carbide. Silicon carbide power modules outperform silicon power modules on every level—be it efficiency, high temperature capability, power density, or specific power. Hence it seems counterintuitive to employ traditional silicon-based packaging techniques for silicon carbide (SiC) power modules. Wire bonded interconnections are a major example of this. They offer a high parasitic inductance in the critical switching loops of power modules, and have reliability concerns at high temperatures. A reduction in the parasitic inductance also translates to less EMI. One of the focus areas of this talk is a novel wire bondless scheme for packaging SiC devices in order to leverage their high frequency and high temperature capabilities to the greatest extent. Other topics will include a discussion on the evaluation procedures for high performance die attach and passivation materials, and an overview of research efforts directed toward designing high density SiC power converters.

Sayan Seal is a final year PhD candidate at the Department of Electrical Engineering at the University of Arkansas. His research focuses on high performance packaging of power electronics modules.

During his graduate study, Sayan has worked on projects involving high performance die attach materials and passivation materials. He has also been involved with developing packaging solutions for high density SiC power converters. Sayan's dissertation is focused on developing a 3D wire bond-less package design for next generation SiC power modules. He has been closely involved with the packaging research efforts at the Center for Power Optimization of Electro-Thermal Systems (POETS) since its inception in 2015. He has also served as the outreach coordinator for the student leadership council at the POETS research center.

Sayan received a Master's degree in Electrical Engineering in 2013 from the University of Arkansas, where he worked on developing plasmonic nanoscale reflectors for thin film solar cells. He also holds two bachelor degrees, one in Physics and the other in Radio Physics and Electronics—both earned at the University of Calcutta, India. 

  April 2017
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