|Organization||Univ. of Wisconsin-Madison|
|Location||136 Monteith Research Center (MRC)|
|Start Date||March 1, 2017 10:15 AM|
|End Date||March 1, 2017 11:30 AM|
Faculty candidate seminar.
The impending end of Moore's Law means we can no longer expect each processor generation to deliver performance gains without applying radical solutions. This is driving systems to become more heterogeneous, combining multiple types of processors or multiple memory technologies in a single system. In this talk, I will introduce hardware changes that tame this heterogeneity and reduce the burden on programmers.
First, I show how to extend mechanisms that ease programming CPU applications to heterogeneous systems with integrated graphics processors (GPUs): namely, coherent data access and a consistent address space. GPUs can provide significant performance improvements over CPUs, but this improvement comes with a huge bandwidth demand. This bandwidth demand overwhelms traditional CPU solutions for cache coherence and address translation. I show how to re-design translation and coherence hardware to handle this bandwidth demand and allow programmers to interact with the GPU just like another CPU core.
Second, I briefly address transparently moving data between heterogeneous memory technologies. I will show that directly using CPU cache policies for high-bandwidth DRAM caches results in waste and can hurt performance. I propose a new adaptive cache policy that minimizes this waste and outperforms other DRAM cache solutions.
Jason Lowe-Power is a PhD candidate at University of Wisconsin-Madison in the Computer Sciences department. Jason's research focuses on increasing the energy efficiency and performance of computing systems with a focus on exposing emerging accelerators to all programmers. His research also targets reducing the energy needed for analytic database operations used by companies like Amazon, Google, Target, etc. to analyze and deeply understand their customers’ needs. He has interned at AMD Research. Jason is a leader of the open-source architectural simulator, gem5, used by over 1500 academic papers. He was awarded the Wisconsin Distinguished Graduate Fellowship Cisco Computer Sciences Award in 2014 and 2015.