Contact Information

2004A Engr Bldg II
Campus Box 7256
NC State University
Raleigh, NC 27695-7256
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Dr. Yan Solihin

| Biography

Yan Solihin is a tenured Full Professor of ECE at NCSU. He joined NCSU in 2002. Currently, Yan Solihin is also a Program Director at the Division of Computer and Network Systems (CNS) at the National Science Foundation. His responsibilities include managing the Secure and Trustworthy Cyberspace (SaTC), Computer Systems Research (CSR), Scalability and Parallelism in the eXtreme (SPX), NSF/Intel Partnership on Foundational Microarchitecture Research (FoMR) programs, among others.

He obtained his B.S. degree in computer science from Institut Teknologi Bandung (ITB) in 1995, B.S. degree in Mathematics from Universitas Terbuka Indonesia in 1995, M.A.Sc degree in computer engineering from Nanyang Technological University in 1997, and M.S. and Ph.D. degrees in computer science from the University of Illinois at Urbana-Champaign in 1999 and 2002. He is a recipient of 2017 MICRO Best Paper Runner-up Award, 2010 and 2005 IBM Faculty Partnership Award, 2004 NSF Faculty Early Career Award, and 1997 AT&T Leadership Award. He is listed in the HPCA Hall of Fame. His research has been selected for Best Paper Award finalist/nomination for ISPASS 2013, IPDPS 2012, and HPCA 2005. His research has been covered by the IEEE Spectrum, US News, PC World, HPCWire, Slashdot, and others. He is an IEEE Fellow.

His research interests include computer architecture, especially architecture support for security, memory hierarchy design, non-volatile memory architecture, programming models, and workload cloning. He has published 90+ journal/conference papers, and 40+ US patents. He has delivered 70+ invited talks/seminars, including several keynote presentations and multi-day tutorials. He has released several software packages to the public: ACAPP - a cache performance model toolset, HeapServer - a secure heap management library, Scaltool - parallel program scalability pinpointer, and Fodex - a forensic document examination toolset. He has written two graduate-level textbook:

| Education

  1. 2002 - PhD in Computer Science, Univ of Illinois at Urbana-Champaign, USA
  2. 1999 - MS in Computer Science, Univ of Illinois at Urbana-Champaign, USA
  3. 1997 - MASc in Computer Engineering, Nanyang Technological University, Singapore
  4. 1995 - BS in Mathematics, Universitas Terbuka, Indonesia
  5. 1995 - BS in Computer Science, Institut Teknologi Bandung, Indonesia

| Primary Research Interests

  1. Computer Architecture and Systems (Including Embedded Computer Systems, Memory Systems / Memory Management*, Microprocessor Architecture*, Parallel and Distributed Computer Architecture*, Security and Reliable/Fault-Tolerant Computing*)

| Selected Publications

  1. Mazen Kharbutli, Xiaowei Jiang, Yan Solihin, Curu Venkataramani and Milos Prvulovic, Comprehensively and Efficiently Protecting the Heap, To appear in Proc. of International Symposium for Programming Languages and Operating Systems (ASPLOS), San Jose, Oct 2006.
  2. Brian Rogers, Milos Prvulovic and Yan Solihin, Effective Data Protection for Distributed Shared Memory Multiprocessors, To appear in Proc. of International Conference of Parallel Architecture and Compilation Techniques (PACT), Seattle, Sep 2006.
  3. Fei Guo and Yan Solihin, An Analytical Model for Cache Replacement Policy Performance, Proc. of ACM SIGMETRICS/Performance 2006 Joint International Conference on Measurement and Modeling of Computer System (SIGMETRICS), Saint-Malo, France, June 2006.
  4. Changhee Jung, Daeseob Lim, Jaejin Lee, and Yan Solihin, Helper Thread Prefetching for Loosely-Coupled Multiprocessor Systems, To appear in Proc. of International Parallel & Distributed Processing Symposium (IPDPS), Isle of Rhodes, Greece, Apr 2006.
  5. Mazen Kharbutli and Yan Solihin, Counter-Based Cache Replacement Algorithms, Proc. of the International Conference on Computer Design (ICCD), San Jose, Oct 2005.
  6. Dhruba Chandra, Fei Guo, Seongbeom Kim, and Yan Solihin, Predicting Inter-Thread Cache Contention on a Chip Multi-Processor Architecture, Proc. of the11th International Symposium on High Performance Computer Architecture (HPCA), San Francisco, Feb 2005. Nominated for Best Paper Award.
  7. Rithin Shetty, Mazen Kharbutli, Yan Solihin, and Milos Prvulovic, A Helper-Thread Approach to Programmable, Automatic, and Low-Overhead Memory Bug Detection, IBM Journal of Research and Development: Special Issue on Exploratory Systems, to appear in April 2006.

| Awards and Honors

  • 2017 - Elevation to IEEE Fellow
  • 2017 - MICRO Best Paper Runner-up Award
  • 2008 - GCOE Visiting Professor, Waseda University, Japan
  • 2005 - Best Paper Award Nomination, 11th IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2005
  • 2010, 2005 - IBM Faculty Partnership Award
  • 2004 - NSF Early Career Award
  • 2001 - Best Paper Award, The 5th Workshop on Multithreaded Execution, Architecture, and Compilation